The word netlist can be used in several different contexts, but perhaps the most popular is in the field of electronic design. In this context, a "netlist" describes the connectivity of an electronic design.

Netlists usually convey connectivity information and provide nothing more than instances, nets, and perhaps some attributes. If they express much more than this, they are usually considered to be a hardware description language such as Verilog, VHDL (Very high speed integrated circuits Hardware Description Language), or any one of several specific languages designed for input to simulators.

Netlists can be either physical or logical; either instance-based or net-based; and flat or hierarchical. The latter can be either folded or unfolded.


Contents and structure of a netlist

Most netlists either contain or refer to descriptions of the parts or devices used. Each time a part is used in a netlist, this is called an "instance." Thus, each instance has a "master", or "definition". These definitions will usually list the connections that can be made to that kind of device, and some basic properties of that device. These connection points are called "ports" or "pins", among several other names.

An "instance" could be anything from a MOSFET transistor or a bipolar transistor, to a resistor, capacitor, or integrated circuit chip.

Instances have "ports". In the case of a vacuum cleaner, these ports would be the three metal prongs in the plug. Each port has a name, and in continuing the vacuum cleaner example, they might be "Neutral", "Live" and "Ground". Usually, each instance will have a unique name, so that if you have two instances of vacuum cleaners, one might be "vac1" and the other "vac2". Besides their names, they might otherwise be identical.

Nets are the "wires" that connect things together in the circuit. There may or may not be any special attributes associated with the nets in a design, depending on the particular language the netlist is written in, and that language's features.

Instance based netlists usually provide a list of the instances used in a design. Along with each instance, either an ordered list of net names is provided, or a list of pairs provided, of an instance port name, along with the net name to which that port is connected. In this kind of description, the list of nets can be gathered from the connection lists, and there is no place to associate particular attributes with the nets themselves. SPICE is perhaps the most famous of instance-based netlists.

Net-based netlists usually describe all the instances and their attributes, then describe each net, and say which port they are connected on each instance. This allows for attributes to be associated with nets. EDIF is probably the most famous of the net-based netlists.


In large designs, it is a common practice to split the design into pieces, each piece becoming a "definition" which can be used as instances in the design. In the case of the vacuum cleaner analogy, one might have a vacuum cleaner definition with its ports, but now this definition would also include a full electrical description of the internals of the vacuum cleaner, including the motors, switches, et cetera, inside it. A definition which includes no instances would be referred to as "primitive", or "leaf", among other names, whereas a definition which includes instances would be "hierarchical".

A "folded" hierarchy allows a single definition to be represented several times by instances. An "unfolded" hierarchy will not allow a definition to be used more than once in the hierarchy. Folded Hierarchies can be extremely compact. A small netlist (for example, just a few hundred instances) could describe connections with tens or hundreds of thousands of instances this way. How? Let us suppose definition "A" is a simple primitive memory cell. Then, suppose that definition "B" contains 32 instances of "A"; "C" contains 32 instances of "B"; "D" contains 32 instances of "C"; and "E" contains 32 instances of "D". At this point, the design contains a total of 5 definitions (A through E) and 128 total instances. Yet, E describes a circuit that contains 1,048,576 instances of "A."

A "flat" design is one where only instances of primitives are allowed. Hierarchical designs can be "exploded" or "flattened" into flat designs via recursive algorithms. "Explosion" can be a very apt term; if the design were highly folded (as in the previous example), this expansion will yield a much larger netlist. Also, folded designs can be "unfolded", by creating a new copy (with a new name) of each definition each time it is used. This will generate a much larger database if the design were highly folded but will also preserve the design's hierarchy.

By providing a list of the instance names as one descends a folded hierarchy from the top definition to the primitives, one can derive a unique hierarchical path to any instance. These paths can be used to tie a flat design description to a folded hierarchical version of the same design.


Backannotation are data that could be added to a hierarchical netlist. Usually they are kept separate from the netlist, because several such alternate sets of data could be applied to a single netlist. These data may have been extracted from a physical design, and might provide extra information for more accurate simulations. Usually the data are composed of a hierarchical path and a piece of data for that primitive or finding the values of rc delay due to interconnection.


Another concept often used in netlists is that of inheritance. Suppose a definition of a capacitor has an associated attribute called "Capacitance" with a default value of "100 pF" (100 picofarads). Each instance of this capacitor might also have such an attribute, only with a different value of capacitance. And other instances might not associate any capacitance at all. In the case where no capacitance is specified for an instance, the instance will "inherit" the 100 pF value from its definition. A value specified will "override" the value on the definition. If a great number of attributes end up being the same as on the definition, a great amount of information can be "inherited", and not have to be redundantly specified in the netlist, saving space, and making the design easier to read by both machines and people.

Wikimedia Foundation. 2010.

Look at other dictionaries:

  • Netlist — Une netlist décrit un circuit imprimé. Elle est obtenue par synthèse logique de la description logique du circuit imprimé. Elle est utilisée pour générer un dessin physique, en général dans un fichier informatique au format GDSII, qui sert à… …   Wikipédia en Français

  • Netlist Inc. — Netlist, Inc. Type Public (NASDAQ: NLST) Founded 2000 Headquarters I …   Wikipedia

  • Standard cell — For the battery used as a voltage reference, see Weston cell. In semiconductor design, standard cell methodology is a method of designing Application Specific Integrated Circuits (ASICs) with mostly digital logic features. Standard cell… …   Wikipedia

  • Formal equivalence checking — process is a part of electronic design automation (EDA), commonly used during the development of digital integrated circuits, to formally prove that two representations of a circuit design exhibit exactly the same behavior. Equivalence checking… …   Wikipedia

  • Comparison of EDA software — Comparison of Electronic Design Automation (EDA) software Contents 1 Free and Open Source Software (FOSS) 2 Proprietary software 3 Comparison of EDA packages 4 See …   Wikipedia

  • Hardware description language — In electronics, a hardware description language or HDL is any language from a class of computer languages and/or programming languages for formal description of electronic circuits. It can describe the circuit s operation, its design and… …   Wikipedia

  • EDIF — stands for Electronic Design Interchange Format, and has been predominantly used as a vendor neutral format in which to store Electronic netlists and schematics. It was one of the first attempts to establish a neutral data exchange format for the …   Wikipedia

  • Wire wrap — This article deals with electronics manufacturing and prototyping techniques, see Wire wrap jewellery for the jewellery related topic Wire wrap is a technique for constructing small numbers of complex electronics assemblies. It is an alternative… …   Wikipedia

  • Electronic design automation — (EDA) is the category of tools for designing and producing electronic systems ranging from printed circuit boards (PCBs) to integrated circuits. This is sometimes referred to as ECAD (electronic computer aided design) or just CAD. (Printed… …   Wikipedia

  • Wrapper (electronique) — Wrapper (électronique) Pour les articles homonymes, voir Wrapper (homonymie). Le wrapping est une technique de connectique d électronique permettant de remplacer les soudures et les connexions standard pour produire des circuits complexes en… …   Wikipédia en Français

Share the article and excerpts

Direct link
Do a right-click on the link above
and select “Copy Link”

We are using cookies for the best presentation of our site. Continuing to use this site, you agree with this.