VAX

VAX
DEC VAX
Manufacturer: Digital Equipment Corporation
Byte size: 8 bits (octet)
Address bus size: 32 bits
Peripheral bus: Unibus, Massbus, Q-Bus, XMI, VAXBI
Architecture: CISC, virtual memory
Operating systems: VAX/VMS, Ultrix, BSD UNIX, VAXELN

VAX was an instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC) in the mid-1970s. A 32-bit complex instruction set computer (CISC) ISA, it was designed to extend or replace DEC's various Programmed Data Processor (PDP) ISAs. The VAX name was also used by DEC for a family of computer systems based on this processor architecture.

The VAX architecture's primary features were virtual addressing (for example demand paged virtual memory) and its orthogonal instruction set. VAX has been perceived as the quintessential CISC ISA, with its very large number of programmer-friendly addressing modes and machine instructions, highly orthogonal architecture, and instructions for complex operations such as queue insertion or deletion and polynomial evaluation.[1]

Contents

Name

"VAX" is originally an acronym for Virtual Address eXtension, both because the VAX was seen as a 32-bit extension of the older 16-bit PDP-11 and because it was (after Prime Computer) an early adopter of virtual memory to manage this larger address space. Early versions of the VAX processor implemented a "compatibility mode" that emulated many of the PDP-11's instructions, and were in fact called VAX-11 to highlight this compatibility and the fact that VAX-11 was an outgrowth of the PDP-11 family. Later versions offloaded the compatibility mode and some of the less used CISC instructions to emulation in the operating system software.

Instruction set

The VAX instruction set was designed to be powerful and orthogonal. When introduced, many programs were written in assembler language, so having a "user-friendly" instruction set was important.[citation needed] In time, as more programs were written in higher-level language, the instruction set became less visible, and the only ones much concerned about it were compiler writers.

Arguably, the VAX instruction set was too complicated. One problem is that it is difficult to predict the start of the next instruction, which becomes important for performance. In most designs, one simply has to look at the opcode to know the instruction length, if even there are different-size instructions at all. Also, people found that complicated instructions were often slower than a sequence of simple instructions. Annoyingly, it was different from model to model as to whether the complicated instructions would be a gain. This spurred research into RISC computing. Later RISC processors would beat the VAX by a significant margin.

Operating systems

The "native" VAX operating system is DEC's VAX/VMS (renamed to OpenVMS in 1991 or 1992 when it was ported to Alpha, "branded" by the X/Open consortium, and modified to comply with POSIX standards[2]). The VAX architecture and VMS operating system were "engineered concurrently" to take maximum advantage of each other, as was the initial implementation of the VAXcluster facility. Other VAX operating systems have included various releases of BSD UNIX up to 4.3BSD, Ultrix-32, VAXELN and Xinu. More recently, NetBSD and OpenBSD support various VAX models and some work has been done on porting Linux to the VAX architecture.

History

VAX-11/780

The first VAX model sold was the VAX-11/780, which was introduced on October 25, 1977 at the Digital Equipment Corporation's Annual Meeting of Shareholders.[3] Bill Strecker, C. Gordon Bell's doctoral student at Carnegie-Mellon University, was responsible for the architecture.[4] Many different models with different prices, performance levels, and capacities were subsequently created. VAX superminis were very popular in the early 1980s.

For a while the VAX-11/780 was used as a baseline in CPU benchmarks because its speed was about one MIPS. The actual number of instructions executed in 1 second was about 500,000. One VAX MIPS was the speed of a VAX-11/780; a computer performing at 27 VAX MIPS would run the same program roughly 27 times faster than the VAX-11/780. Within the Digital community the term VUP (VAX Unit of Performance) was the more common term, because MIPS do not compare well across different architectures. The related term cluster VUPs was informally used to describe the aggregate performance of a VAXcluster. The performance of the VAX-11/780 still serves as the baseline metric in the BRL-CAD Benchmark, a performance analysis suite included in the BRL-CAD solid modeling software distribution. The VAX-11/780 included a subordinate stand-alone LSI-11 computer that performed microcode load, booting, and diagnostic functions for the parent computer. This was dropped from subsequent VAX models. Enterprising VAX-11/780 users could therefore run three different Digital Equipment Corporation operating systems: VMS on the VAX processor, or either RSX-11M or RT-11 on the LSI-11.

VAX 8350 front view with cover removed.

The VAX went through many different implementations. The original VAX was implemented in TTL and filled more than one rack for a single CPU. CPU implementations that consisted of multiple ECL gate array or macrocell array chips included the VAX 8600 and 8800 superminis and finally the VAX 9000 mainframe class machines. CPU implementations that consisted of multiple MOSFET custom chips included the 8100 and 8200 class machines.

The MicroVAX I represented a major transition within the VAX family. At the time of its design, it was not yet possible to implement the full VAX architecture as a single VLSI chip (or even a few VLSI chips as was later done with the V-11 CPU of the VAX 8200/8300). Instead, the MicroVAX I was the first VAX implementation to move most of the complexity of the VAX instruction set into emulation software, preserving just the core instructions in hardware. This new partitioning substantially reduced the amount of microcode required and was referred to as the "MicroVAX" architecture. In the MicroVAX I, the ALU and registers were implemented as a single gate-array chip while the rest of the machine control was conventional logic.

A full VLSI (microprocessor) implementation of the MicroVAX architecture then arrived with the MicroVAX II's 78032 (or DC333) CPU and 78132 (DC335) FPU. The 78032 was the first microprocessor with an on-board memory management unit[5] The MicroVAX II was based on a single, quad-sized processor board which carried the processor chips and ran the MicroVMS or Ultrix-32 operating systems. The machine featured 1 MB of on-board memory and a Q22-bus interface with DMA transfers. The MicroVAX II was succeeded by many further MicroVAX models with much improved performance and memory.

Further VLSI VAX processors followed in the form of the V-11, CVAX, SOC ("System On Chip", a single-chip CVAX), Rigel, Mariah and NVAX implementations. The VAX microprocessors extended the architecture to inexpensive workstations and later also supplanted the high-end VAX models. This wide range of platforms (mainframe to workstation) using one architecture was unique in the computer industry at that time. Sundry graphics were etched onto the CVAX microprocessor die. The phrase CVAX... when you care enough to steal the very best was etched in broken Russian as a play on a Hallmark Cards slogan, intended as a message to Soviet engineers who were known to be both purloining DEC computers for military applications, along with reverse engineering their chip design.[6][7]

The VAX architecture was eventually superseded by RISC technology. In 1989 DEC introduced a range of workstations and servers that ran Ultrix, the DECstation and DECsystem respectively, based on processors that implemented the MIPS architecture. In 1992 DEC introduced their own RISC instruction set architecture, the Alpha AXP (later renamed Alpha), and their own Alpha-based microprocessor, the DECchip 21064, a high performance 64-bit design capable of running OpenVMS.

In August 2000, Compaq announced that the remaining VAX models would be discontinued by the end of the year.[8] By 2005 all manufacturing of VAX computers had ceased, but old systems remain in widespread use.

The Stromasys CHARON-VAX and SIMH software-based VAX emulators remain available.

Processor architecture

VAX
Designer Digital Equipment Corporation
Bits 32-bit
Introduced 1977
Design CISC
Type Memory-Memory
Encoding Variable (1 to 56 bytes)
Branching Compare and branch
Endianness Little
Extensions VAXvector
Registers
16

Virtual memory map

The VAX virtual memory is divided into four sections, each of which is one gigabyte[9] in size:

Section Address Range
P0 0x00000000 - 0x3fffffff
P1 0x40000000 - 0x7fffffff
S0 0x80000000 - 0xbfffffff
S1 0xc0000000 - 0xffffffff

For VMS, P0 was used for user process space, P1 for process stack, S0 for the operating system, and S1 was reserved.

Privilege modes

The VAX has four hardware implemented privilege modes (see Processor Status Register):

No. Mode VMS Usage Notes
0 Kernel OS Kernel Highest Privilege Level
1 Executive File System
2 Supervisor Shell (DCL)
3 User Normal Programs Lowest Privilege Level

Processor status register

CM TP MBZ FD IS cmod pmod MBZ IPL MBZ DV FU IV T N Z V C
31 30 29 27 26 25 23 21 20 15 7 6 5 4 3 2 1 0
Bits Meaning
31 PDP-11 compatibility mode
30 trace pending
29:28 MBZ (must be zero)
27 first part done (interrupted instruction)
26 interrupt stack
25:24 current privilege mode
23:22 previous privilege mode
21 MBZ (must be zero)
20:16 IPL (interrupt priority level)
15:8 MBZ (must be zero)
7 decimal overflow trap enable
6 floating-point underflow trap enable
5 integer overflow trap enable
4 trace
3 negative
2 zero
1 overflow
0 carry

Addressing modes

The VAX supports many addressing modes: literal, register, postincrement, predecrement, register deferred, postincrement deferred, predecrement deferred, displacement (byte, word, long), displacement (byte, word, long) deferred; also indexed, which may be combined with many of these. An "immediate" mode is synonymous with program counter (PC) postincrement, and many addressing modes could use the program counter (which is also R15) instead of other registers. This provided for easy generation of position-indepedent code through "PC-relative" addressing. The VAX also has some "load effective address" instructions, which do not access memory but compute the address that should be used.

VAX-based systems

The first VAX-based system was the VAX-11/780, a member of the VAX-11 family. The high-end VAX 8600 replaced the VAX-11/780 in October 1984 and was joined by the entry-level MicroVAX minicomputers and the VAXstation workstations in the mid-1980s. The MicroVAX was superseded by the VAX 4000, the VAX 8000 was superseded by the VAX 6000 in the late 1980s and the mainframe-class VAX 9000 was introduced. In the early 1990s, the fault-tolerant VAXft was introduced, as were the Alpha compatible VAX 7000/10000. A variant of various VAX-based systems were sold as the VAXserver.

Cancelled systems

Cancelled systems include the "BVAX", a high-end ECL-based VAX, and two other ECL-based VAXen: "Argonaut" and "Raven".[10] A VAX known as "Gemini" was also cancelled, which was a fall-back in case the LSI-based Scorpio failed. It never shipped.

Clones

K 1840, VAX-11/780 clone, 1988, Technical Collections Dresden

A number of VAX clones, both authorized and unauthorized, were produced. Examples include:

  • Systime Ltd. of the United Kingdom produced clones of early VAX models such as the Systime 8750 (equivalent to the VAX 11/750).[11]
  • Norden Systems produced the ruggedized, Military-specification MIL VAX series.[2]
  • The Hungarian Central Research Institute for Physics (KFKI) produced a series of clones of early VAX models, the TPA-11/540, 560 and 580.[12]
  • The SM 52/12[13] from Czechoslovakia, developed at VUVT Žilina (today Slovakia) and produced from 1986 at ZVT Banská Bystrica (today Slovakia).
  • The East German Robotron K 1840 (SM 1710) was a clone of the VAX-11/780 and Robotron K 1820 (SM 1720) was a copy of the MicroVAX II.
  • The SM 1700 was a Soviet clone of the VAX-11/750.[14]

Image gallery

References

  1. ^ Payne, Mary; Bhandarkar, Dileep (1980). "VAX floating point: a solid foundation for numerical computation". SIGARCH Comput. Archit. News (ACM) 8 (4): pp 22–33. doi:10.1145/641845.641849. ISSN 0163-5964. 
  2. ^ a b Rainville, Jim; Howard, Karen, eds (1997). "VAX/VMS at 20". Digital Equipment Corporation. http://h71000.www7.hp.com/openvms/20th/. Retrieved 2009-07-27. 
  3. ^ "VAX 11/780, The First VAX System (October 1977)". http://www.old-computers.com/history/detail.asp?n=20&t=3. 
  4. ^ Slater, Robert (1987). Portraits in Silicon. MIT Press. p. 213. ISBN 9780262691314. http://books.google.com/?id=aWTtMyYmKhUC&dq=%22Bill+Strecker%22+vax+designer. 
  5. ^ The Computer History Simulation Project: MicroVAX II (1985)
  6. ^ micro.magnet.fsu.edu, Steal the best, retrieved 30 January 2008. The Russian phrase was: СВАКС... Когда вы забатите довольно воровать настоящий лучший
  7. ^ The Computer History Simulation Project: CVAX (1987), retrieved 30 January 2008
  8. ^ "VAX Systems: A letter from Jesse Lipcon". Archived from the original on 2000-08-15. http://web.archive.org/web/20000815201016/http://www.compaq.com/alphaserver/vax/vax_letter_final.html. 
  9. ^ In the context of addressing, 1 GB is equal to 230 bytes
  10. ^ Mark Smotherman (2008-07-19). "Who are the Computer Architects?". http://www.cs.clemson.edu/~mark/architects.html. Retrieved 2008-09-30. 
  11. ^ "RAL Informatics Report 1984-85". http://www.chilton-computing.org.uk/inf/literature/inf_reports/p001.htm. Retrieved 2007-10-15. 
  12. ^ "The TPA story". http://hampage.hu/tpa/e_index.html. Retrieved 2007-10-15. 
  13. ^ Dujnic, J.; Fristacky, N.; Molnar, L.; Plander, I.; Rovan, B.: On the history of computer science, computer engineering, and computer technology development in Slovakia. IEEE Annals of the History of Computing, vol. 21, no. 3, pp. 38-48, July-Sept. 1999
  14. ^ Laimutis Telksnys, Antanas Zilinskas: Computers in Lithuania. IEEE Annals of the History of Computing, vol. 21, no. 3, pp. 31-37, July-Sept. 1999

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