- HRS-100
HRS-100, ХРС-100, GVS-100 or ГВС-100, (ref.1, 2 and 3) (Serbian: Hibridni Računarski Sistem, Russian: Гибридная Вычислительная Система, English translation: "Hybrid Computer System") was a third generation
hybrid computer developed byMihajlo Pupin Institute (Serbia , thenSFR Yugoslavia ) and engineers fromUSSR . It was deployed in Academy of Sciences of USSR in1971 . More production was contemplated for use inCzechoslovakia and German Democratic Republic (DDR).HRS-100 was intended for scientific and technical research, modelling of complex
dynamical system s in real and accelerated scale time and for efficient solving of wide array of scientific tasks.Overview
HRS-100 was composed of:
* universaldigital computer :
** central processor
** 16 kilowords of 0.9 μs 36-bit magnetic core primary memory , expandable to 64 kilowords.
** secondarydisk storage
**peripheral devices (teleprinter s,punched tape reader/puncher, parallel printer andpunched card reader.
* multipleanalog computer modules
* interconnection devices
* multiple analog and digital peripheral devicesCentral processing unit
HRS-100 has a 32-bit TTL MSI processor with following capabilities:
* four basic arithmetic operations are implemented in hardware for both
fixed point andfloating point operations
*Addressing mode s: immediate/literal, absolute/direct, relative, unlimited-depth multi-level memory indirect and relative-indirect
* 7index register s and dedicated "index arithmetic" hardware
* 32interrupt "channels" (10 from within theCPU , 10 from peripherals and 12 from interconnection devices and analog computer)Primary memory
Primary memory was made up of 0.9 μs cycle time
magnetic core modules. Each 36-bit word is organized as follows:* 32 data bits
* 1parity bit
* 3 program protection bits specifying which program (Operating System and up to 7 running applications) has accessecondary storage
Secondary storagte was composed of up to 8
CDC 9432 D removable-media disk drive devices. Capacity of one set of disk platters wasa about 4 million 6-bit words or 768,000 words of HRS-100 computer. Total, combined, capacity of 8 drives is, therefore, 6,144,000 words. Each disk set comprised 6 platters out of which 10 surfaces are used. Data was organized into 100 cylinders and 16 1536-bit sectors (48 HRS-100 words).Average "data" access time was 100 ms (max. 165 ms). Maximum seek time was 25 ms. Raw transfer sector write speed was 208,333 characters/s.
Peripherals
Peripherals communicate with the computer using interrupts and full length of HRS-100 words. Each separate unit has its own controller. Following devices were produces or planned:
* 5 to 8 channel
Punched tape readerPE 1001 (500-1000 characters/s)
* 5 to 8 channel tape puncherPE 4060 (150 characters/s)
*IBM 735 teleprinter (88 character set, 7-bit data + 1 parity bit, printing speed: 15 characters/s)
* Fastline printer DP 2440 (up to 700 lines/min, 64-character set, 132 characters per line)
* Standard 80-columnpunched card readerDP SR300 (reading up to 300 cards/min)Interconnection hardware
Interconnection hardware (called simply "Link") connects digital and analog components of HRS-100 into a single unified computer. It comprised:
* Control unit for exchange of logic signals
* Blocks of A/D andD/A converters
* 16-bit 100 μsclock generator
* Conversion channel relay block
* Power supplyLink takes commands from a digital computer component and organizes their execution via 2 32-bit data channels, 11 control channels, synchronization signals via 3 channels and 9 interrupt channels. Connection between a digital and analog computers is established through a "common-control panel" and two separate consoles. Communicating digital data with analog consoles is done through 16 control, 16 sensitivity, 16 indicator and 10 functional "lines".
Analog-to-digital conversion is achieved by a single signed 14-bit 70,000 samples/s A/D converter and a 32-channel
multiplexer . Digital-to-analog conversion is achieved by 16 independent signed 14-bit D/A converters with double registers. Typical D/A conversion took 2 μs.Analog computer
Analog component of HRS-100 system is composed of up to seven analog machines all connected to the common-control panel. It contains all elements required to independently solve linear and non-linear
differential equation s, both directly and iteratively.Units of analog computer:
* linear analog calculation elements
* non-linear analog calculation elements
* parallel logic elements
* electronicpotentiometer system
* calculation module and parallel logic control system
* periodic block
* control system
* address system
* measurement system
* exchangeable program board (analog and digital)
* reference voltate supplyLinear analog computer elements were designed to facilitate 0.01% precision in static mode and 0.1% in dynamic mode, for signals up to 1
kHz . Non-linear elements precision was not required to be better than 0.1%.Analog component of HRS-100 has its own peripheral units:
* multi-channel ultraviolet writer
* three-colouroscilloscope
* X-Y writerDevelopment team
HRS-100 was designed and developed by the following team (ref.1 and 4):
* Principal Science Researchers: Prof. Boris Kogan (Institute of Control Sciences - IPU AN.USSR,
Moscow ) and Petar Vrbavac, Georgi Konstantinov (Mihajlo Pupin Institute ,Belgrade ).
* Chief designers:
** Digital part: Svetomir Ojdanić, Dušan Hristović (SFRY ), A. Volkov , V. Lisikov (USSR )
** Analogue part: N. N. Mihaylov (USSR ), Slavoljub Marjanović, Pavle Pejović (SFRY )
** Link: Milan Hruška, Čedomir Milenković (SFRY ), A. G. Spiro (USSR )
** Software: E. A. Trahtengerc, V. L. Arlazarov (USSR ).ee also
*
History of computer hardware in the SFRY
*Mihajlo Pupin Institute
*List of Soviet computer systems References
# HRS-100 (Hardware and Design Principles),pp.3-52, Ed.prof.Boris J.Kogan, IPU AN.USSR, Moscow, 1974 (in russian)
# HRS-100, Proceedings of Intern.Congress AICA-1973, Prague, pp.305-324, 27-31.August 1973.
#Analog Computing in the Soviet Union, D. Abramovitch, IEEE Control Systems Magazine, pp. 52-62, June 2005.
# Hybrid Computing System HRS-100, by P.Vrbavac, S.Ojdanic, D.Hristovic, M.Hruska, S.Marjanovic, Proc.6.Int.Symp.on Electronics and Automation, pp.347-356, Herceg Novi,Yugoslavia, 21-27.June 1971.
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