- Open NAND Flash Interface Working Group
-
The Open NAND Flash Interface Working Group (ONFI or ONFi[1] with a lower case "i"), is a consortium of technology companies working to develop open standards for NAND flash memory chips and devices that communicate with them.[2] The formation of ONFI was announced at the Intel Developer Forum in March 2006.
The group's goals notably do not include the development of a new consumer flash memory card format.[3] Rather, ONFI seeks to standardize the low-level interface to raw NAND flash chips, which are the most widely used form of non-volatile memory circuits today; in 2006, nearly one trillion MiB of flash memory was incorporated into consumer electronics, and production was expected to double in 2007.[4]
Contents
Motivation
As of 2006[update], NAND flash memory chips from most vendors use similar packaging, have similar pinouts, and accept similar sets of low-level commands. As a result, when more capable and inexpensive models of NAND flash become available, product designers can incorporate them without major design changes. However, "similar" operation is not optimal:[5] subtle differences in timing and command set mean that products must be thoroughly debugged and tested when a new model of flash chip is used in them.[4] When a flash controller is expected to operate with various NAND flash chips, it must store a table of them in its firmware so that it knows how to deal with differences in their interfaces.[4][5] This increases the complexity and time-to-market of flash-based devices, and means they are likely to be incompatible with future models of NAND flash, unless and until their firmware is updated.
Thus, one of the main motivations for standardization of NAND flash is to make it easier to switch between NAND chips from different producers, thereby permitting faster development of NAND-based products and lower prices via increased competition among manufacturers. As of 2006[update], NAND flash is increasingly a commodity product,[6] like SDRAM or 3.5 in (89 mm) hard disk drives. It is incorporated into many personal computer and consumer electronics products such as USB flash drives, MP3 players, and solid-state drives. Product designers would like 2 GiB and 4 GiB NAND flash chips, for example, to be as easily interchangeable as 60 GB and 80 GB 3.5 in hard disks from different manufacturers.[6]
Historical similarities
The effort to standardize NAND flash may be compared to earlier standardization of electronic components. For example, the 7400 series of TTL digital integrated circuits were originally produced by Texas Instruments, but had become a de facto standard family by the late 1970s. These ICs are manufactured as commodity parts by a number of different vendors. This has allowed designers to freely mix 7400 components from different vendors—and even to mix components based on different logic families, once the 74HCT sub-family become available (consisting of CMOS components with TTL-compatible logic levels).
Members
The ONFI consortium is led by several prominent manufacturers of NAND flash memory:
Samsung and Toshiba, the world's largest manufacturers of NAND flash, are notably absent from the ONFI consortium.[7]
A number of major vendors of NAND flash-based consumer electronics and computing products are also members of ONFI (see External links for the current list of members).
ONFI standard
ONFI has produced a specification for a standard interface to NAND flash chips.
Version 1.0 of this specification was released on December 28, 2006, and is available at no cost from the ONFI web site (see External links). It specifies:
- a standard physical interface (pinout) for NAND flash in TSOP-48, WSOP-48, LGA-52, and BGA-63 packages
- a standard mechanism for NAND chips to identify themselves and describe their capabilities (comparable to the Serial Presence Detection feature of SDRAM modules)
- a standard command set for reading, writing, and erasing NAND flash
- standard timing requirements for NAND flash
- improved performance via a standard implementation of read cache and increased concurrency for NAND flash operations
- improved data integrity by allowing optional ECC memory features
Version 2.0 - February 2008 ONFI 2.0 defines a high-speed NAND Flash interface that can deliver speeds greater than 133 MB/s, whereas the legacy NAND interface was limited to 50 MB/s.
Version 2.1 - January 2009 New features that deliver speeds of 166 MB/s and 200 MB/s, plus other enhancements to increase power, performance, and ECC capabilities.
Version 2.2 - October 2009 - Individual LUN reset - Enhanced program page register clear - New Icc specs and measurement LUN reset and page register clear enable more efficient operation in larger systems with many NAND devices, while the standardized Icc testing and definitions will provide simplified vendor testing and improved data consistency
Block Abstracted NAND ONFI created the Block Abstracted NAND addendum specification to simplify host controller design by relieving the host of the complexities of ECC, bad block management, and other low-level NAND management tasks. The ONFI Block Abstracted NAND revision 1.1 specification adds the high speed source synchronous interface, which provides up to a 5X improvement in bandwidth compared with the traditional asynchronous NAND interface. The ONFI Workgroup continues to evolve the ONFI specifications to meet the needs of a rapidly growing and changing industry.
NAND Connector The NAND Connector Specification was ratified in April of 2008. It specifies a standardized connection for NAND modules (similar to DRAM DIMMs) for use in applications like caching and SSDs in PC platforms.
Version 3.0 - March 2011 - promotes a high-speed NAND Flash interface supporting transfer rates up to 400 MB/s - requires fewer chip-enable pins enabling more efficient PCB routing - designed for the future and supports the EZ-NAND interface
See also
References
- ^ "ONFI web site presentation page". ONFI.org. http://onfi.org/presentations/. Retrieved 2010-07-31.
- ^ "New Group Simplifies NAND Flash Integration". 2006-05-09. http://onfi.org/news-events/new-group-simplifies-nand-flash-integration/. Retrieved 2010-07-31.
- ^ "ONFI FAQ page". ONFI.org. http://www.onfi.org/about/faq/. Retrieved 2010-07-31.
- ^ a b c Huffman, Amber. "Open NAND Flash Interface: The First Wave of NAND Standardization". ONFI.org. http://onfi.org/wp-content/uploads/2009/02/idf_f06_mems002_100p.pdf. Retrieved 2010-07-31.
- ^ a b See section "The Curse of Similarity" in this white paper by Arun Kamat of Hynix: "Simplifying Flash Controller Design".
- ^ a b See this presentation by Amber Huffman and Michael Abraham of Micron.
- ^ See this article from The Register's hardware division: "Intel primes Flash standardisation push"
External links
- Official website
- List of ONFI member companies
- Version 3.0 of the official ONFI specification
- Version 1.1 of the official ONFI Block Abstracted NAND specification
- ONFI Specification Downloads and Revision History
News articles:
- Article from Dr. Dobb's Journal: "Simplify Your Flash-Memory Interface" (September 25, 2006)
- Article from The Register's hardware division: "Vendors pledge to make Flash as easy to upgrade as RAM" (January 22, 2007)
- Article from The Register's hardware division: "Intel primes Flash standardisation push"
- Article on ONFi Verification IP "First Verification IP on ONFi 2.1"
Categories:- Computer memory
- Non-volatile memory
- Standards organizations
- Trade associations
- Technology trade associations
Wikimedia Foundation. 2010.
