Barrel processor

Barrel processor

A barrel processor is a CPU that switches between threads of execution on every cycle. This CPU design technique is also known as "interleaved" or "fine-grained" temporal multithreading. As opposed to simultaneous multithreading in modern superscalar architectures, it generally does not allow execution of multiple instructions in one cycle.

For example, certain CDC Cyber computers executed one instruction from each of 20 different threads before returning to the first thread. Also, the IP3023 processor from Ubicom executes one instruction from each of 8 different threads before returning to the first thread.

Like preemptive multitasking, each thread of execution is assigned its own program counter and other hardware registers (each thread's architectural state). A barrel processor can guarantee that each thread will execute 1 instruction every N cycles, unlike a preemptive multitasking machine, that typically runs one thread of execution for hundreds or thousands of cycles, while all other threads wait their turn.

A technique called C-slowing can take a normal single-tasking processor design and automatically generate a corresponding barrel processor design. An n-way barrel processor generated this way acts much like n separate multiprocessing copies of the original single-tasking processor, each one running at roughly 1/n the original speed.

Advantages compared to single threaded processors

A single-tasking processor spends a lot of time waiting around, not doing anything useful, whenever a cache miss or pipeline stall occurs. Advantages to employing barrel processors over single-tasking processors include:
* The ability to do useful work on the other threads while the stalled thread is waiting.
* Designing an n-way barrel processor with n-deep pipelines is much simpler than designing a single-tasking processor because a barrel processor never has a pipeline stall and doesn't need feed-forward circuits.
* For real-time applications, a Barrel processor can guarantee that a "real-time" thread can execute with precise timing, no matter what happens to the other threads -- even if some other thread locks up in an infinite loop or is continuously interrupted by hardware interrupts.

Disadvantages compared to single threaded processors

There are, however, some disadvantages to barrel processors.

* Either all threads must share the same cache, which slows overall system performance, or there must be one unit of cache for each execution thread, which can significantly increase the transistor count (and thus cost) of such a CPU. However, most barrel processors are used to implement hard real time embedded systems, memory access costs are typically calculated assuming worst case behavior of the cache, so this is less of a concern.
* The state of each thread must be kept on-chip (typically in registers) to avoid costly off-chip context switches. This requires a large number of registers compared to typical processors.

ee also

*Super-threading
*Computer multitasking
*Simultaneous multithreading
*Hyper-threading

External links

* [http://www.embedded.com/story/OEG20030509S0043 Soft peripherals] Embedded.com article examines Ubicom's IP3023 processor
* [http://www.cs.clemson.edu/~mark/g60.ps An Evaluation of the Design of the Gamma 60]


Wikimedia Foundation. 2010.

Игры ⚽ Нужна курсовая?

Look at other dictionaries:

  • Barrel (disambiguation) — Barrel can refer to: * barrel, a cylindrical container, specifically: ** aging barrel, for aging alcoholic beverages ** Barrel (volume) a unit of volume * barrel (horology), a watch component * barrel (unit), several different units of volume *… …   Wikipedia

  • Processor register — In computer architecture, a processor register is a small amount of storage available as part of a CPU or other digital processor. Such registers are (typically) addressed by mechanisms other than main memory and can be accessed more quickly.… …   Wikipedia

  • Heterogeneous Element Processor — The Heterogeneous Element Processor (HEP) was introduced by Denelcor in 1982 as the world s first commercial MIMD computer. A HEP system, as the name implies, was pieced together from many heterogeneous components processors, data memory modules …   Wikipedia

  • Multi-core processor — Diagram of a generic dual core processor, with CPU local level 1 caches, and a shared, on die level 2 cache …   Wikipedia

  • Digital signal processor — A Digital Signal Processor chip found in a guitar effects unit. A digital signal processor (DSP) is a specialized microprocessor with an architecture optimized for the fast operational needs of digital signal processing.[1] …   Wikipedia

  • Simultaneous multithreading — Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple independent threads of execution to better utilize the resources… …   Wikipedia

  • Multithreading (computer hardware) — Multithreading computers have hardware support to efficiently execute multiple threads. These are distinguished from multiprocessing systems (such as multi core systems) in that the threads must all operate in the same address space, as there is… …   Wikipedia

  • UltraSPARC T1 — Sun UltraSPARC T1 (Niagara 8 Core) Produced 2005 Designed by Sun Microsystems Common manufacturer(s) …   Wikipedia

  • Hyper-threading — (officially termed Hyper Threading Technology or HTT) is an Intel proprietary technology used to improve parallelization of computations performed on PC microprocessors via simultaneous multithreading. It is an improvement on super threading. It… …   Wikipedia

  • Super-threading — is a multithreading approach that weaves together the execution of different threads on a single processor without truly executing them at the same time. [ [http://arstechnica.com/articles/paedia/cpu/hyperthreading.ars/3 Superthreading with a… …   Wikipedia

Share the article and excerpts

Direct link
Do a right-click on the link above
and select “Copy Link”