Teraflops Research Chip

Teraflops Research Chip

The Teraflops Research Chip (also called Polaris) is the first processor prototype developed by Intel's Tera-scale Computing Research Program in multi-core and energy efficient computing. The processor was briefly presented at the IDF on September 26, 2006 and officially announced on February 11, 2007 and shown working at the 2007 ISSCC.

The chip contains 80 cores, each containing two programmable floating point engines and one 5-port messaging passing router. Constructed using a 65 nm CMOS process, the die is 12.64 mm by 21.72 mm (274.5 mm²) and contains 100 million transistors. The package is connected through a 1248 pin LGA with 343 signal pins.

Running at 3.16 GHz the chip achieved 1.01 TFLOPS with a total power consumption of 62 W and a on-chip temperature of convert|110|°C|K|abbr=on|lk=on. [ [http://techresearch.intel.com/articles/Tera-Scale/1449.htm Teraflops Research Chip ] ] Increasing frequency to 5.7 GHz and power to 265 W increased performance to 1.81 TFLOPS and later 2 TFLOPS. [http://www.theinquirer.net/default.aspx?article=40469 "The Inquirer" news article]

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